Automatic Compilation Will Be Key for Success of the Accelerator Revolution

Hardware architects have been designing and introducing interesting and feature-rich architectures to handle emerging workloads. When a new architecture arrives, compilation is usually primitive in the initial few years before automatic code generation and optimizations get mature. This has been true with most architectures in the past, including central processing units (CPUs) and SIMD-style CPU extensions; emerging hardware accelerators are no exception.