Analyzing the Monolithic Integration of a ReRAM-Based Main Memory Into a CPU's Die

Nonvolatile memory, such as resistive RAM (ReRAM), is compatible with standard CMOS logic processes, allowing a sizable main memory system to be integrated into a CPU's die. ReRAM bitcells are fabricated within crosspoint subarrays that leave the bulk of transistors underneath the subarrays vacant. This permits placing the memory system over the CPU, improving area, parallelism, and power. Our work quantifies the impact of integrating ReRAM into a CPU's die. When integrating ReRAM over CPU logic, the best area efficiency occurs when 48% of the die is covered with ReRAM. The CPU's area increases by 18.8%, but we can recoup 35.5% of the die area by utilizing the free transistors underneath the crosspoint subarrays. When integrating ReRAM over CPU cache, up to 85.3% of the cache can be covered with ReRAM. Our work also shows that on-die ReRAM can support very high bandwidth through massively parallel memory access. At 28 nm, 4–16k independent ReRAM banks could be integrated onto the CPU die, providing 512–1024–GB/s peak bandwidth. At more advanced technology nodes, 5–10 TB/s may be possible.