Low-Power, Resilient Interconnection with Orthogonal Latin Squares
A reliable, energy-efficient on-chip interconnection network employing low-swing signaling can be designed by incorporating error-correcting code. Orthogonal Latin Square Code (OLSC) can protect the interconnection against transient errors, while also lowering energy consumption. When applied to a 6...
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Veröffentlicht in: | IEEE design & test of computers 2011-03, Vol.28 (2), p.30-39 |
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Format: | Artikel |
Sprache: | eng |
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Zusammenfassung: | A reliable, energy-efficient on-chip interconnection network employing low-swing signaling can be designed by incorporating error-correcting code. Orthogonal Latin Square Code (OLSC) can protect the interconnection against transient errors, while also lowering energy consumption. When applied to a 64-bit link using a 45-nm CMOS technology with low-swing signaling, OLSC provided up to 55% energy reduction, with only a small area overhead and no loss in reliability. |
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ISSN: | 0740-7475 2168-2356 1558-1918 2168-2364 |
DOI: | 10.1109/MDT.2011.35 |