A 32-bit RISC Implemented in Enhancement-Mode JFET GaAs

The reduced instruction set computer (RISC) philosophy presently employed in an enhancement-mode GaAs JFET favors instruction sets with few format options or addressing modes; more complex instructions are synthesized as required out of the simpler ones. The RISC approach results in a greatly simpli...

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Bibliographische Detailangaben
Veröffentlicht in:	Computer (Long Beach, Calif.) Calif.), 1986-10, Vol.19 (10), p.60-68
Hauptverfasser:	RASSET, T L, Niederland, R A, Lane, J H, GELDEMAN, W A
Format:	Artikel
Sprache:	eng
Schlagworte:	360601 - Other Materials- Preparation & Manufacture 360603 - Materials- Properties 360605 - Materials- Radiation Effects 420800 - Engineering- Electronic Circuits & Devices- (-1989) 990200 - Mathematics & Computers ARSENIC COMPOUNDS ARSENIDES COMPUTERS COST DEFECTS DIGITAL COMPUTERS ELECTRONIC CIRCUITS ELEMENTS ENERGY CONSUMPTION ENGINEERING FABRICATION FIELD EFFECT TRANSISTORS Gallium arsenide GALLIUM ARSENIDES GALLIUM COMPOUNDS Integrated circuit technology INTEGRATED CIRCUITS IONIZING RADIATIONS Logic MATERIALS SCIENCE MATERIALS TESTING MATHEMATICS AND COMPUTING MICROELECTRONIC CIRCUITS MICROPROCESSORS PHYSICAL RADIATION EFFECTS PNICTIDES Power semiconductor switches RADIATION EFFECTS RADIATIONS Reduced instruction set computing SEMICONDUCTOR DEVICES SEMIMETALS SILICON Space technology SUPERCOMPUTERS TEMPERATURE EFFECTS TESTING TRANSISTORS
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Beschreibung
Zusammenfassung:	The reduced instruction set computer (RISC) philosophy presently employed in an enhancement-mode GaAs JFET favors instruction sets with few format options or addressing modes; more complex instructions are synthesized as required out of the simpler ones. The RISC approach results in a greatly simplified, typically hardwired control structure which, in addition to being very fast, leaves more chip area available for performance enhancements to the data path and facilitates real time processing. (O.C.)
ISSN:	0018-9162 1558-0814
DOI:	10.1109/MC.1986.1663072