A 112-Gb/s, -10 dBm Sensitivity, +5 dBm Overload, and SiPh-Based Receiver Frontend in 22-nm FDSOI

This letter demonstrates a Si-Photonic (SiPh)-based 112 Gb/s PAM4 optical receiver frontend using novel single-ended transimpedance amplifier (TIA) architecture that achieves −10 and +5 dBm input optical modulation amplitude (OMA) sensitivity and overload, respectively. To achieve that an overload m...

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Veröffentlicht in:	IEEE solid-state circuits letters 2024, Vol.7, p.263-266
Hauptverfasser:	Parvizi, Mahdi, Jalali, Bahar, Omori, Toshi, Rogers, John, Chen, Li, Chen, Long, Aroca, Ricardo
Format:	Artikel
Sprache:	eng
Schlagworte:	Gain Input referred noise Light modulation Linearity Noise Noise sensitivity Optical receivers overload mitigation Overloading PAM4 Prevention and mitigation Resistors SOI (semiconductors) Switches transimpedance amplifier (TIA)
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