A 10-GHz Bandwidth Transimpedance Amplifier With Input DC Photocurrent Compensation Loop

A transimpedance amplifier (TIA) fabricated in a 55-nm low-power CMOS process is presented. The TIA, a current-reuse regulated cascode (CRRGC) topology, includes an active balun and differential output drivers. To maximize integration in high-speed photoreceivers, the TIA also includes dc current co...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
Veröffentlicht in:IEEE microwave and wireless components letters 2020-07, Vol.30 (7), p.673-676
Hauptverfasser: Costanzo, Robert, Bowers, Steven M.
Format: Artikel
Sprache:eng
Schlagworte:
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
Beschreibung
Zusammenfassung:A transimpedance amplifier (TIA) fabricated in a 55-nm low-power CMOS process is presented. The TIA, a current-reuse regulated cascode (CRRGC) topology, includes an active balun and differential output drivers. To maximize integration in high-speed photoreceivers, the TIA also includes dc current compensation, removing the requirement for bias-tees between the TIA and the photodiode (PD). The TIA achieves a transimpedance gain of 69 dB \Omega across a 3-dB bandwidth of 10.7 GHz. Additionally, the TIA demonstrates low-noise performance with an equivalent input noise density of 15 pA/ \sqrt {{\mathrm {Hz}}} in the passband. The dc compensation is capable of providing a fixed bias voltage for a PD while sourcing up to 2.4 mA or sinking up to 1 mA of photocurrent. The TIA, including active balun and dc current compensation, consumes 15.7 mW, while the output buffer consumes 90.7 mW. The total active area of the circuit is 0.07 mm 2 , and 0.21 mm 2 with pads.
ISSN:1531-1309
2771-957X
1558-1764
2771-9588
DOI:10.1109/LMWC.2020.2993726