Back-End-of-Line Compatible Transistor With Ultrathin InZnO Channel Enabling Operations in Cryogenic Environments

This study successfully achieved the transfer characteristics of a transistor by utilizing an ultrathin (~4 nm) indium zinc oxide (InZnO) channel. We explored optimal post-annealing and channel deposition conditions. The transistor operation became apparent when it was annealed in ambient air at temperatures exceeding 300~^{\circ } C, despite the presence of clockwise hysteresis induced by charge trapping. Therefore, oxygen vacancies (V O ) serving as carriers in the InZnO channel were generated through annealing; however, they were easily trapped at existing defect sites formed during channel deposition. Higher temperatures (or longer durations) for annealing annihilated the defects and enhanced subthreshold swing (SS) by allowing more V O to participate. However, the presence of oxygen impurities (e.g., -OH), believed to originate from the gate dielectric owing to excessive annealing, can worsen the SS. Furthermore, threshold voltage (V TH ) modulation was primarily achieved by adjusting the plasma gas ratio of argon and oxygen during InZnO sputtering or high-k gate dielectric materials. Finally, the optimized transistor, featuring an Mo/HfO 2 /InZnO stack annealed at 350~^{\circ } C for 20 min, showed reliable transfer and output characteristics with a V TH of 0.5 V and SS of 119 mV/dec, even at a cryogenic temperature of 83 K.