A Study on the Charge Trapping Characteristics of High-k Laminated Traps

The charge trapping characteristics of the high-k laminated traps with different thickness ratios were investigated in order to improve the distribution of threshold voltage and the charge loss problems in 3D NAND flash memories with TCAT structure. In this letter, the interfacial layers are formed...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
Veröffentlicht in:IEEE electron device letters 2019-09, Vol.40 (9), p.1427-1430
Hauptverfasser: Yoo, Jinhyuk, Kim, SoonKon, Jeon, Woojin, Park, Areum, Choi, Donghee, Choi, Byoungdeog
Format: Artikel
Sprache:eng
Schlagworte:
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
Beschreibung
Zusammenfassung:The charge trapping characteristics of the high-k laminated traps with different thickness ratios were investigated in order to improve the distribution of threshold voltage and the charge loss problems in 3D NAND flash memories with TCAT structure. In this letter, the interfacial layers are formed between the HfO 2 /Al 2 O 3 laminated films, which increase trap sites and improve charge storage capability. In addition, due to the difference in bandgap between HfO 2 and Al 2 O 3 , the HfO 2 layer forms a deep quantum well and the Al 2 O 3 layer acts as a barrier to prevent the loss of electrons captured in the charge trapping layer. The barriers prevent trapped electrons from escaping to other layers. In other words, it reduces the loss of charges from the charge trapping layer to Si or gate electrode. Also, the number of interfaces and the ratio of appropriate laminate film thickness are important factors for obtaining good data retention characteristics. The experimental results show a higher charge storage density and a larger memory window of 11.5 V in the structure that has many interfaces and a 1/1 of HfO 2 /Al 2 O 3 thickness ratio. In this structure, the leakage current is 4.61 \times 10 −9 A/cm 2 and charge loss rate is 14.9%, which are the lowest values in tested structures. The proposed high-k laminated trap structure may be very useful in future 3D NAND flash memory device applications.
ISSN:0741-3106
1558-0563
DOI:10.1109/LED.2019.2932007