A Retention-Aware Multilevel Cell Phase Change Memory Program Evaluation Metric

Multilevel cell (MLC) phase change memory (PCM) offers many potential advantages in scalability, bit-alterability, non-volatility, and high program speed. While many program approaches had been proposed, they were usually evaluated in energy, delay, or energy-delay product (EDP). These metrics, howe...

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Veröffentlicht in:IEEE electron device letters 2016-11, Vol.37 (11), p.1422-1425
Hauptverfasser: Win-San Khwa, Meng-Fan Chang, Jau-Yi Wu, Ming-Hsiu Lee, Tzu-Hsiang Su, Tien-Yen Wang, Hsiang-Pang Li, BrightSky, Matthew, SangBum Kim, Hsiang-Lan Lung, Chung Lam
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Sprache:eng
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Zusammenfassung:Multilevel cell (MLC) phase change memory (PCM) offers many potential advantages in scalability, bit-alterability, non-volatility, and high program speed. While many program approaches had been proposed, they were usually evaluated in energy, delay, or energy-delay product (EDP). These metrics, however, often overlook the data integrity maintenance (DIM) overhead caused by the resistance drift (R-drift) phenomenon in the MLC PCM. This letter proposes a program-maintenance (PM) metric, which is a modified EDP metric with DIM consideration. Furthermore, we evaluated the PM metric of various pulse shapes in iterative program-verify scheme. From the measured data of a 128M-cell MLC PCM chip, we showed that the PM metric of optimized pulse shape is better than those of the conventional SET and RESET pulse shapes up to 86.7%.
ISSN:0741-3106
1558-0563
DOI:10.1109/LED.2016.2614513