InZnO/AlSnZnInO Bilayer Oxide Thin-Film Transistors With High Mobility and High Uniformity
In this letter, high-performance InZnO/AlSnZnInO (IZO/ATZIO) bilayer thin-film transistors (TFTs) with an inverted staggered back channel etch structure are presented. The channel width and the length were both 6 μm, which is small enough to be adapted to a high-resolution display backplane. High fi...
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| Veröffentlicht in: | IEEE electron device letters 2016-10, Vol.37 (10), p.1295-1298 |
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| container_title | IEEE electron device letters |
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| creator | Choi, Ji Hun Yang, Jong-Heon Nam, Sooji Pi, Jae-Eun Kim, Hee-Ok Kwon, Oh-Sang Park, Eun-Suk Hwang, Chi-Sun Cho, Sung Haeng |
| description | In this letter, high-performance InZnO/AlSnZnInO (IZO/ATZIO) bilayer thin-film transistors (TFTs) with an inverted staggered back channel etch structure are presented. The channel width and the length were both 6 μm, which is small enough to be adapted to a high-resolution display backplane. High field-effect mobility (μ FE ) over 60 cm 2 /Vs was obtained from the structure with 8-nm IZO channel insertion between the gate dielectric and the ATZIO layer. The device shows good controllability in light of TFT operation. The subthreshold slope, turn-ON voltage (V ON ), and ON/OFF ratio were 0.16 V/decade, -1.52 V, and 5×10 9 , respectively. |
| doi_str_mv | 10.1109/LED.2016.2602284 |
| format | Article |
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The channel width and the length were both 6 μm, which is small enough to be adapted to a high-resolution display backplane. High field-effect mobility (μ FE ) over 60 cm 2 /Vs was obtained from the structure with 8-nm IZO channel insertion between the gate dielectric and the ATZIO layer. The device shows good controllability in light of TFT operation. The subthreshold slope, turn-ON voltage (V ON ), and ON/OFF ratio were 0.16 V/decade, -1.52 V, and 5×10 9 , respectively.</description><identifier>ISSN: 0741-3106</identifier><identifier>EISSN: 1558-0563</identifier><identifier>DOI: 10.1109/LED.2016.2602284</identifier><identifier>CODEN: EDLEDZ</identifier><language>eng</language><publisher>New York: IEEE</publisher><subject>AlSnZnInO ; Annealing ; bilayer ; inverted staggered BCE structure ; InZnO ; Iron ; Logic gates ; oxide TFT ; Semiconductor device measurement ; Temperature measurement ; Thin film transistors ; Uninterruptible power systems</subject><ispartof>IEEE electron device letters, 2016-10, Vol.37 (10), p.1295-1298</ispartof><rights>Copyright The Institute of Electrical and Electronics Engineers, Inc. (IEEE) 2016</rights><lds50>peer_reviewed</lds50><woscitedreferencessubscribed>false</woscitedreferencessubscribed><citedby>FETCH-LOGICAL-c291t-19877a5dc853c7d1b3e6107c67ec922c67ba8805e2c7b85a50a7a78ee89a8d593</citedby><cites>FETCH-LOGICAL-c291t-19877a5dc853c7d1b3e6107c67ec922c67ba8805e2c7b85a50a7a78ee89a8d593</cites><orcidid>0000-0002-4857-4260</orcidid></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://ieeexplore.ieee.org/document/7551162$$EHTML$$P50$$Gieee$$H</linktohtml><link.rule.ids>314,776,780,792,27901,27902,54733</link.rule.ids><linktorsrc>$$Uhttps://ieeexplore.ieee.org/document/7551162$$EView_record_in_IEEE$$FView_record_in_$$GIEEE</linktorsrc></links><search><creatorcontrib>Choi, Ji Hun</creatorcontrib><creatorcontrib>Yang, Jong-Heon</creatorcontrib><creatorcontrib>Nam, Sooji</creatorcontrib><creatorcontrib>Pi, Jae-Eun</creatorcontrib><creatorcontrib>Kim, Hee-Ok</creatorcontrib><creatorcontrib>Kwon, Oh-Sang</creatorcontrib><creatorcontrib>Park, Eun-Suk</creatorcontrib><creatorcontrib>Hwang, Chi-Sun</creatorcontrib><creatorcontrib>Cho, Sung Haeng</creatorcontrib><title>InZnO/AlSnZnInO Bilayer Oxide Thin-Film Transistors With High Mobility and High Uniformity</title><title>IEEE electron device letters</title><addtitle>LED</addtitle><description>In this letter, high-performance InZnO/AlSnZnInO (IZO/ATZIO) bilayer thin-film transistors (TFTs) with an inverted staggered back channel etch structure are presented. The channel width and the length were both 6 μm, which is small enough to be adapted to a high-resolution display backplane. High field-effect mobility (μ FE ) over 60 cm 2 /Vs was obtained from the structure with 8-nm IZO channel insertion between the gate dielectric and the ATZIO layer. The device shows good controllability in light of TFT operation. The subthreshold slope, turn-ON voltage (V ON ), and ON/OFF ratio were 0.16 V/decade, -1.52 V, and 5×10 9 , respectively.</description><subject>AlSnZnInO</subject><subject>Annealing</subject><subject>bilayer</subject><subject>inverted staggered BCE structure</subject><subject>InZnO</subject><subject>Iron</subject><subject>Logic gates</subject><subject>oxide TFT</subject><subject>Semiconductor device measurement</subject><subject>Temperature measurement</subject><subject>Thin film transistors</subject><subject>Uninterruptible power systems</subject><issn>0741-3106</issn><issn>1558-0563</issn><fulltext>true</fulltext><rsrctype>article</rsrctype><creationdate>2016</creationdate><recordtype>article</recordtype><sourceid>RIE</sourceid><recordid>eNo9kEFrwjAYhsPYYM7tPtglsHM1X9I06dE5nYKjhykDLyFt44zU1CUV9N-vUtnphZfn_T54EHoGMgAg6XAxeR9QAsmAJoRSGd-gHnAuI8ITdot6RMQQMSDJPXoIYUcIxLGIe2g9d2uXDUfVV5tzl-E3W-mz8Tg72dLg5da6aGqrPV567YINTe0D_rbNFs_szxZ_1rmtbHPG2pVds3J2U_t92z2iu42ugnm6Zh-tppPleBYtso_5eLSICppCE0EqhdC8LCRnhSghZyYBIopEmCKltM1cS0m4oYXIJdecaKGFNEamWpY8ZX302t09-Pr3aEKjdvXRu_alAslIKrlkcUuRjip8HYI3G3Xwdq_9WQFRF4OqNaguBtXVYDt56SbWGPOPC84BEsr-AMwSazs</recordid><startdate>20161001</startdate><enddate>20161001</enddate><creator>Choi, Ji Hun</creator><creator>Yang, Jong-Heon</creator><creator>Nam, Sooji</creator><creator>Pi, Jae-Eun</creator><creator>Kim, Hee-Ok</creator><creator>Kwon, Oh-Sang</creator><creator>Park, Eun-Suk</creator><creator>Hwang, Chi-Sun</creator><creator>Cho, Sung Haeng</creator><general>IEEE</general><general>The Institute of Electrical and Electronics Engineers, Inc. (IEEE)</general><scope>97E</scope><scope>RIA</scope><scope>RIE</scope><scope>AAYXX</scope><scope>CITATION</scope><scope>7SP</scope><scope>8FD</scope><scope>L7M</scope><orcidid>https://orcid.org/0000-0002-4857-4260</orcidid></search><sort><creationdate>20161001</creationdate><title>InZnO/AlSnZnInO Bilayer Oxide Thin-Film Transistors With High Mobility and High Uniformity</title><author>Choi, Ji Hun ; Yang, Jong-Heon ; Nam, Sooji ; Pi, Jae-Eun ; Kim, Hee-Ok ; Kwon, Oh-Sang ; Park, Eun-Suk ; Hwang, Chi-Sun ; Cho, Sung Haeng</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-c291t-19877a5dc853c7d1b3e6107c67ec922c67ba8805e2c7b85a50a7a78ee89a8d593</frbrgroupid><rsrctype>articles</rsrctype><prefilter>articles</prefilter><language>eng</language><creationdate>2016</creationdate><topic>AlSnZnInO</topic><topic>Annealing</topic><topic>bilayer</topic><topic>inverted staggered BCE structure</topic><topic>InZnO</topic><topic>Iron</topic><topic>Logic gates</topic><topic>oxide TFT</topic><topic>Semiconductor device measurement</topic><topic>Temperature measurement</topic><topic>Thin film transistors</topic><topic>Uninterruptible power systems</topic><toplevel>peer_reviewed</toplevel><toplevel>online_resources</toplevel><creatorcontrib>Choi, Ji Hun</creatorcontrib><creatorcontrib>Yang, Jong-Heon</creatorcontrib><creatorcontrib>Nam, Sooji</creatorcontrib><creatorcontrib>Pi, Jae-Eun</creatorcontrib><creatorcontrib>Kim, Hee-Ok</creatorcontrib><creatorcontrib>Kwon, Oh-Sang</creatorcontrib><creatorcontrib>Park, Eun-Suk</creatorcontrib><creatorcontrib>Hwang, Chi-Sun</creatorcontrib><creatorcontrib>Cho, Sung Haeng</creatorcontrib><collection>IEEE All-Society Periodicals Package (ASPP) 2005-present</collection><collection>IEEE All-Society Periodicals Package (ASPP) 1998-Present</collection><collection>IEEE Electronic Library (IEL)</collection><collection>CrossRef</collection><collection>Electronics & Communications Abstracts</collection><collection>Technology Research Database</collection><collection>Advanced Technologies Database with Aerospace</collection><jtitle>IEEE electron device letters</jtitle></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Choi, Ji Hun</au><au>Yang, Jong-Heon</au><au>Nam, Sooji</au><au>Pi, Jae-Eun</au><au>Kim, Hee-Ok</au><au>Kwon, Oh-Sang</au><au>Park, Eun-Suk</au><au>Hwang, Chi-Sun</au><au>Cho, Sung Haeng</au><format>journal</format><genre>article</genre><ristype>JOUR</ristype><atitle>InZnO/AlSnZnInO Bilayer Oxide Thin-Film Transistors With High Mobility and High Uniformity</atitle><jtitle>IEEE electron device letters</jtitle><stitle>LED</stitle><date>2016-10-01</date><risdate>2016</risdate><volume>37</volume><issue>10</issue><spage>1295</spage><epage>1298</epage><pages>1295-1298</pages><issn>0741-3106</issn><eissn>1558-0563</eissn><coden>EDLEDZ</coden><abstract>In this letter, high-performance InZnO/AlSnZnInO (IZO/ATZIO) bilayer thin-film transistors (TFTs) with an inverted staggered back channel etch structure are presented. The channel width and the length were both 6 μm, which is small enough to be adapted to a high-resolution display backplane. High field-effect mobility (μ FE ) over 60 cm 2 /Vs was obtained from the structure with 8-nm IZO channel insertion between the gate dielectric and the ATZIO layer. The device shows good controllability in light of TFT operation. The subthreshold slope, turn-ON voltage (V ON ), and ON/OFF ratio were 0.16 V/decade, -1.52 V, and 5×10 9 , respectively.</abstract><cop>New York</cop><pub>IEEE</pub><doi>10.1109/LED.2016.2602284</doi><tpages>4</tpages><orcidid>https://orcid.org/0000-0002-4857-4260</orcidid></addata></record> |
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| subjects | AlSnZnInO Annealing bilayer inverted staggered BCE structure InZnO Iron Logic gates oxide TFT Semiconductor device measurement Temperature measurement Thin film transistors Uninterruptible power systems |
| title | InZnO/AlSnZnInO Bilayer Oxide Thin-Film Transistors With High Mobility and High Uniformity |
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