Scalability of Extremely Thin SOI (ETSOI) MOSFETs to Sub-20-nm Gate Length
We report high-performance extremely thin SOI MOSFETs fabricated with a channel thickness down to 3.5 nm, sub-20-nm gate length, and contacted gate pitch of 100 nm. At an effective channel length of 18 nm, a drain-induced barrier lowering of 100 mV is achieved by either thinning the channel to 3.5 n...
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Veröffentlicht in: | IEEE electron device letters 2012-02, Vol.33 (2), p.149-151 |
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Format: | Artikel |
Sprache: | eng |
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Zusammenfassung: | We report high-performance extremely thin SOI MOSFETs fabricated with a channel thickness down to 3.5 nm, sub-20-nm gate length, and contacted gate pitch of 100 nm. At an effective channel length of 18 nm, a drain-induced barrier lowering of 100 mV is achieved by either thinning the channel to 3.5 nm or by applying a reverse back-gate bias to 6-nm channel MOSFETs. Moreover, minimal increase in series resistance is seen when the channel is scaled to 3.5 nm, resulting in no performance degradation with SOI thickness scaling. |
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ISSN: | 0741-3106 1558-0563 |
DOI: | 10.1109/LED.2011.2174411 |