Investigation on the Retention Reliability of Scaled \hbox/\hbox\hbox/\hbox Inter-Poly Dielectrics for nand Flash Cell Arrays
We investigate the retention reliability of a 51-nm-node 16-GB nand Flash cell transistor comprising SiO 2 /Al x O y /SiO 2 inter-poly dielectric (OAO IPD). Despite the fact that OAO IPD retains low trapping rate being beneficial to retention reliability, the trap sites are located on shallow energy...
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| Veröffentlicht in: | IEEE electron device letters 2010-04, Vol.31 (4), p.266-268 |
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| container_end_page | 268 |
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| container_issue | 4 |
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| container_title | IEEE electron device letters |
| container_volume | 31 |
| creator | Se Hoon Lee Mincheol Park Byung Yong Choi Suk-Kang Sung Tae Hun Kim Byongsun Ju Dong Chan Kim Choong-Ho Lee Keonsoo Kim Jungdal Choi Kinam Kim |
| description | We investigate the retention reliability of a 51-nm-node 16-GB nand Flash cell transistor comprising SiO 2 /Al x O y /SiO 2 inter-poly dielectric (OAO IPD). Despite the fact that OAO IPD retains low trapping rate being beneficial to retention reliability, the trap sites are located on shallow energy level, yielding a large amount of trap-assisted tunneling current at high temperature. Therefore, experimental results show two incompatible data retention characteristics of OAO IPD, namely, 33% worse V TH shift at 200°C 2-h bake and 53% improved V TH shift after one week at 25°C, when compared to the case of ONO IPD. |
| doi_str_mv | 10.1109/LED.2009.2039985 |
| format | Article |
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Despite the fact that OAO IPD retains low trapping rate being beneficial to retention reliability, the trap sites are located on shallow energy level, yielding a large amount of trap-assisted tunneling current at high temperature. Therefore, experimental results show two incompatible data retention characteristics of OAO IPD, namely, 33% worse V TH shift at 200°C 2-h bake and 53% improved V TH shift after one week at 25°C, when compared to the case of ONO IPD.</description><identifier>ISSN: 0741-3106</identifier><identifier>EISSN: 1558-0563</identifier><identifier>DOI: 10.1109/LED.2009.2039985</identifier><identifier>CODEN: EDLEDZ</identifier><language>eng</language><publisher>IEEE</publisher><subject>Aluminum oxide ; Atmospheric measurements ; Charge measurement ; Current measurement ; Dielectric measurements ; Electron traps ; High K dielectric materials ; High- k dielectric ; High-K gate dielectrics ; inter-poly dielectric (IPD) ; nand Flash memory ; retention reliability ; Temperature ; Tunneling</subject><ispartof>IEEE electron device letters, 2010-04, Vol.31 (4), p.266-268</ispartof><lds50>peer_reviewed</lds50><woscitedreferencessubscribed>false</woscitedreferencessubscribed><citedby>FETCH-LOGICAL-c1742-8195745e43f28c9a8f57671018ed4e565a2716d45263e087aee60cf5e814a18c3</citedby><cites>FETCH-LOGICAL-c1742-8195745e43f28c9a8f57671018ed4e565a2716d45263e087aee60cf5e814a18c3</cites></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://ieeexplore.ieee.org/document/5419996$$EHTML$$P50$$Gieee$$H</linktohtml><link.rule.ids>314,778,782,794,27911,27912,54745</link.rule.ids><linktorsrc>$$Uhttps://ieeexplore.ieee.org/document/5419996$$EView_record_in_IEEE$$FView_record_in_$$GIEEE</linktorsrc></links><search><creatorcontrib>Se Hoon Lee</creatorcontrib><creatorcontrib>Mincheol Park</creatorcontrib><creatorcontrib>Byung Yong Choi</creatorcontrib><creatorcontrib>Suk-Kang Sung</creatorcontrib><creatorcontrib>Tae Hun Kim</creatorcontrib><creatorcontrib>Byongsun Ju</creatorcontrib><creatorcontrib>Dong Chan Kim</creatorcontrib><creatorcontrib>Choong-Ho Lee</creatorcontrib><creatorcontrib>Keonsoo Kim</creatorcontrib><creatorcontrib>Jungdal Choi</creatorcontrib><creatorcontrib>Kinam Kim</creatorcontrib><title>Investigation on the Retention Reliability of Scaled \hbox/\hbox\hbox/\hbox Inter-Poly Dielectrics for nand Flash Cell Arrays</title><title>IEEE electron device letters</title><addtitle>LED</addtitle><description>We investigate the retention reliability of a 51-nm-node 16-GB nand Flash cell transistor comprising SiO 2 /Al x O y /SiO 2 inter-poly dielectric (OAO IPD). Despite the fact that OAO IPD retains low trapping rate being beneficial to retention reliability, the trap sites are located on shallow energy level, yielding a large amount of trap-assisted tunneling current at high temperature. Therefore, experimental results show two incompatible data retention characteristics of OAO IPD, namely, 33% worse V TH shift at 200°C 2-h bake and 53% improved V TH shift after one week at 25°C, when compared to the case of ONO IPD.</description><subject>Aluminum oxide</subject><subject>Atmospheric measurements</subject><subject>Charge measurement</subject><subject>Current measurement</subject><subject>Dielectric measurements</subject><subject>Electron traps</subject><subject>High K dielectric materials</subject><subject>High- k dielectric</subject><subject>High-K gate dielectrics</subject><subject>inter-poly dielectric (IPD)</subject><subject>nand Flash memory</subject><subject>retention reliability</subject><subject>Temperature</subject><subject>Tunneling</subject><issn>0741-3106</issn><issn>1558-0563</issn><fulltext>true</fulltext><rsrctype>article</rsrctype><creationdate>2010</creationdate><recordtype>article</recordtype><sourceid>RIE</sourceid><recordid>eNpNkM1Lw0AQxRdRsFbvgpf9B9LuJPt5LG3VQkGpehPCdjuxK2siu0HMwf_d9AMRhjfD8N47_Ai5BjYCYGa8nM9GOWOml8IYLU7IAITQGROyOCUDpjhkBTB5Ti5SemcMOFd8QH4W9Rem1r_Z1jc17afdIl1hi_X-scLg7doH33a0qeiTswE39HW7br7He_130kXdYswem9DRmceAro3eJVo1kda23tDbYNOWTjEEOonRdumSnFU2JLw67iF5uZ0_T--z5cPdYjpZZg4UzzMNRigukBdVrp2xuhJKKmCgccNRSGFzBXLDRS4LZFpZRMlcJVADt6BdMSTs0Otik1LEqvyM_sPGrgRW7vCVPb5yh6884usjN4eIR8Q_u-BgjJHFL5WIbHo</recordid><startdate>201004</startdate><enddate>201004</enddate><creator>Se Hoon Lee</creator><creator>Mincheol Park</creator><creator>Byung Yong Choi</creator><creator>Suk-Kang Sung</creator><creator>Tae Hun Kim</creator><creator>Byongsun Ju</creator><creator>Dong Chan Kim</creator><creator>Choong-Ho Lee</creator><creator>Keonsoo Kim</creator><creator>Jungdal Choi</creator><creator>Kinam Kim</creator><general>IEEE</general><scope>97E</scope><scope>RIA</scope><scope>RIE</scope><scope>AAYXX</scope><scope>CITATION</scope></search><sort><creationdate>201004</creationdate><title>Investigation on the Retention Reliability of Scaled \hbox/\hbox\hbox/\hbox Inter-Poly Dielectrics for nand Flash Cell Arrays</title><author>Se Hoon Lee ; Mincheol Park ; Byung Yong Choi ; Suk-Kang Sung ; Tae Hun Kim ; Byongsun Ju ; Dong Chan Kim ; Choong-Ho Lee ; Keonsoo Kim ; Jungdal Choi ; Kinam Kim</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-c1742-8195745e43f28c9a8f57671018ed4e565a2716d45263e087aee60cf5e814a18c3</frbrgroupid><rsrctype>articles</rsrctype><prefilter>articles</prefilter><language>eng</language><creationdate>2010</creationdate><topic>Aluminum oxide</topic><topic>Atmospheric measurements</topic><topic>Charge measurement</topic><topic>Current measurement</topic><topic>Dielectric measurements</topic><topic>Electron traps</topic><topic>High K dielectric materials</topic><topic>High- k dielectric</topic><topic>High-K gate dielectrics</topic><topic>inter-poly dielectric (IPD)</topic><topic>nand Flash memory</topic><topic>retention reliability</topic><topic>Temperature</topic><topic>Tunneling</topic><toplevel>peer_reviewed</toplevel><toplevel>online_resources</toplevel><creatorcontrib>Se Hoon Lee</creatorcontrib><creatorcontrib>Mincheol Park</creatorcontrib><creatorcontrib>Byung Yong Choi</creatorcontrib><creatorcontrib>Suk-Kang Sung</creatorcontrib><creatorcontrib>Tae Hun Kim</creatorcontrib><creatorcontrib>Byongsun Ju</creatorcontrib><creatorcontrib>Dong Chan Kim</creatorcontrib><creatorcontrib>Choong-Ho Lee</creatorcontrib><creatorcontrib>Keonsoo Kim</creatorcontrib><creatorcontrib>Jungdal Choi</creatorcontrib><creatorcontrib>Kinam Kim</creatorcontrib><collection>IEEE All-Society Periodicals Package (ASPP) 2005-present</collection><collection>IEEE All-Society Periodicals Package (ASPP) 1998-Present</collection><collection>IEEE Electronic Library (IEL)</collection><collection>CrossRef</collection><jtitle>IEEE electron device letters</jtitle></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Se Hoon Lee</au><au>Mincheol Park</au><au>Byung Yong Choi</au><au>Suk-Kang Sung</au><au>Tae Hun Kim</au><au>Byongsun Ju</au><au>Dong Chan Kim</au><au>Choong-Ho Lee</au><au>Keonsoo Kim</au><au>Jungdal Choi</au><au>Kinam Kim</au><format>journal</format><genre>article</genre><ristype>JOUR</ristype><atitle>Investigation on the Retention Reliability of Scaled \hbox/\hbox\hbox/\hbox Inter-Poly Dielectrics for nand Flash Cell Arrays</atitle><jtitle>IEEE electron device letters</jtitle><stitle>LED</stitle><date>2010-04</date><risdate>2010</risdate><volume>31</volume><issue>4</issue><spage>266</spage><epage>268</epage><pages>266-268</pages><issn>0741-3106</issn><eissn>1558-0563</eissn><coden>EDLEDZ</coden><abstract>We investigate the retention reliability of a 51-nm-node 16-GB nand Flash cell transistor comprising SiO 2 /Al x O y /SiO 2 inter-poly dielectric (OAO IPD). Despite the fact that OAO IPD retains low trapping rate being beneficial to retention reliability, the trap sites are located on shallow energy level, yielding a large amount of trap-assisted tunneling current at high temperature. Therefore, experimental results show two incompatible data retention characteristics of OAO IPD, namely, 33% worse V TH shift at 200°C 2-h bake and 53% improved V TH shift after one week at 25°C, when compared to the case of ONO IPD.</abstract><pub>IEEE</pub><doi>10.1109/LED.2009.2039985</doi><tpages>3</tpages></addata></record> |
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| language | eng |
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| source | IEEE Electronic Library (IEL) |
| subjects | Aluminum oxide Atmospheric measurements Charge measurement Current measurement Dielectric measurements Electron traps High K dielectric materials High- k dielectric High-K gate dielectrics inter-poly dielectric (IPD) nand Flash memory retention reliability Temperature Tunneling |
| title | Investigation on the Retention Reliability of Scaled \hbox/\hbox\hbox/\hbox Inter-Poly Dielectrics for nand Flash Cell Arrays |
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