A novel fully CMOS process compatible PREM for SOC applications
A novel nonvolatile memory cell named programmable resistor with eraseless memory (PREM) is proposed for system on chip applications for the first time. PREM combines a novel "eraseless" algorithm and the progressive breakdown of an ultrathin oxide. No or one extra mask is needed with a st...
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Veröffentlicht in: | IEEE electron device letters 2005-03, Vol.26 (3), p.203-204 |
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Format: | Artikel |
Sprache: | eng |
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Zusammenfassung: | A novel nonvolatile memory cell named programmable resistor with eraseless memory (PREM) is proposed for system on chip applications for the first time. PREM combines a novel "eraseless" algorithm and the progressive breakdown of an ultrathin oxide. No or one extra mask is needed with a standard CMOS process. Multitime programming, multilevel cell, nonvolatility, and low-voltage operation are realized. Good reliability is demonstrated based on the result of a single cell. |
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ISSN: | 0741-3106 1558-0563 |
DOI: | 10.1109/LED.2005.843221 |