An 80-Gb/s/pin Single-Ended Voltage-Mode PAM-4 Transmitter With a Pulsewidth Pre-Emphasis and a 4-Tap FFE in 28-nm CMOS

This article demonstrates an 80-Gb/s/pin low-voltage swing terminated logic (LVSTL) four-level pulse amplitude-modulation (PAM-4) single-ended voltage-mode transmitter (TX) in 28-nm CMOS technology for the high-speed dynamic random access memory (DRAM) interface application. To achieve the target data rate and compensate channel loss, the pulsewidth pre-emphasis (PWPE) driver and a 4-tap reconfigurable feed-forward equalizer (FFE) are used. The data transition information for PWPE is acquired in the low data rate region, and the pulsewidth is adjusted by a delay cell. PWPE can extend the bandwidth without signal amplitude reduction. The proposed TX achieves an eye opening with > 26.9-mV eye height, > 0.16 unit interval (UI) eye width, > 0.99 ratio of level mismatch (RLM), and 3.06 pJ/b at 80-Gb/s PAM-4 signaling for a 2 ^{31} - 1 pseudorandom binary sequence (PRBS-31) pattern.