A Quadrature Class-G Complex-Domain Doherty Digital Power Amplifier

This article presents an efficient quadrature digital power amplifier (DPA) based on a complex-domain Doherty (CDD) architecture. The proposed CDD architecture allows a PA to achieve high efficiency through Doherty operation in a complex domain using two independent vectors with different amplitudes...

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Veröffentlicht in:IEEE journal of solid-state circuits 2021-07, Vol.56 (7), p.2029-2039
Hauptverfasser: Hung, Shih-Chang, Yoo, Si-Wook, Yoo, Sang-Min
Format: Artikel
Sprache:eng
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Zusammenfassung:This article presents an efficient quadrature digital power amplifier (DPA) based on a complex-domain Doherty (CDD) architecture. The proposed CDD architecture allows a PA to achieve high efficiency through Doherty operation in a complex domain using two independent vectors with different amplitudes and phases. It demonstrates high efficiency when two vectors have in-phase components in the complex domain by introducing an additional efficiency peak. The proposed DPA based on a switch-capacitor PA (SCPA) employs the CDD and dual-supply Class-G techniques to enhance system efficiency (SE) and adds three additional efficiency peaks down to 12-dB power back-off (PBO). An additional efficiency peak at 6-dB PBO and two additional efficiency peaks at 2.5- and 12-dB PBOs are associated with CDD and Class-G, respectively. The prototype, fabricated in a 65-nm CMOS process, achieves 27.8-dBm peak output power ( P_{\mathrm {OUT}} ) with a peak SE of 32.1%. It exhibits an error vector magnitude (EVM) of −42.0 dB (−43.3 dB) at a P_{\mathrm {OUT}} of 14.7 dBm (15.4 dBm) for an 802.11ax 40-MHz (20-MHz) 1024-QAM OFDM signal with 13.1-dB (12.4-dB) peak-to-average power ratio (PAPR) at 2.2 GHz. The average SE measured with a 20-MHz single-carrier 1024-QAM signal with 6.8-dB PAPR at a P_{\mathrm {OUT}} of 21 dBm is 18.4%.
ISSN:0018-9200
1558-173X
DOI:10.1109/JSSC.2020.3040973