A surface-charge random-access memory system

A surface-charge random-access memory system

The authors present a surface-charge storage cell suitable for word-organized dynamic random-access memory and discuss its operation in a memory system. Experimental results and computer simulations of the readout process on a 4/spl times/8 array using this cell are given. A sensitive stable sense-a...

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Veröffentlicht in:IEEE journal of solid-state circuits 1972-10, Vol.7 (5), p.330-335
Hauptverfasser: Engeler, W.E., Tiemann, J.J., Baertsch, R.D.
Format: Artikel
Sprache:eng
Schlagworte:
Charge transfer
Computational modeling
Computer simulation
Electrodes
Predictive models
Random access memory
Read-write memory
Shift registers
Signal processing
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Beschreibung
Zusammenfassung:The authors present a surface-charge storage cell suitable for word-organized dynamic random-access memory and discuss its operation in a memory system. Experimental results and computer simulations of the readout process on a 4/spl times/8 array using this cell are given. A sensitive stable sense-and-refresh amplifier, suitable for use with this memory cell is also described. Simulations of a 4096-bit chip with a storage cell density of 2.5 mils/SUP 2//bit using this refresh amplifier predict a cycle time of 250 ns.
ISSN:0018-9200
1558-173X
DOI:10.1109/JSSC.1972.1052888