Analysis of Bandwidth Reduction and Resolution Improvement for Photonics-Assisted ADC

To keep pace with increasing data rates in the worldwide communication networks and the increased bandwidths requirements in measurement devices, sensors, radar, and many other applications, photonics-assisted analog-to-digital converters (PADCs) may be promising alternatives to circumvent the bandw...

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Veröffentlicht in:Journal of lightwave technology 2023-10, Vol.41 (19), p.1-10
Hauptverfasser: Mandalawi, Younus, Meier, Janosch, Singh, Karanveer, Hosni, Mohamed I., De, Souvaraj, Schneider, Thomas
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Sprache:eng
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Zusammenfassung:To keep pace with increasing data rates in the worldwide communication networks and the increased bandwidths requirements in measurement devices, sensors, radar, and many other applications, photonics-assisted analog-to-digital converters (PADCs) may be promising alternatives to circumvent the bandwidth bottleneck in pure electronic analog-to-digital converters (EADCs). Here we analyze optical sub-Nyquist orthogonal sampling with sinc-pulse sequences for the time-interleaving of high-bandwidth input signals into parallel low-bandwidth sub-signals (first sampling stage). These sub-signals are then detected and further processed with low-bandwidth electronic devices in parallel branches (second sampling stage). Orthogonal sampling with ideal devices is error-free. Additionally, in contrast to electronic sample and hold circuits, the first sampling stage is based on a multiplication and not a switching. Therefore, it adds no aperture jitter and the low jitter of today's oscillators can be directly transferred to the sampling of high-bandwidth signals. Compared to the direct detection, in simulations and a proof of concept experimental demonstration, we show around 8.5 dB signal-to-noise and distortion (SINAD) and 1.4 bit effective number of bits (ENOB) improvement for the detection of a 14.5 GHz signal with the proposed method in a three-branch system. With further simulations we analyze the possibilities and limits of the method and derive an equation for the resolution. In a nine-branch system with a jitter of 10 fs for the oscillator and 100 fs for the electronics, 100 GHz input signals can be processed with a resolution of 6 bit in 11 GHz electronics, for instance. The scheme is only based on a modulator and standard RF equipment. Therefore, integration into a single chip, together with the following electronic ADCs is straightforward.
ISSN:0733-8724
1558-2213
DOI:10.1109/JLT.2023.3279876