Self-Biased Ultralow Power Current-Reused Neural Amplifier With On-Chip Analog Spike Detections

An ultralow power 0.6 V neural amplifier with on-chip analog spike detection is presented. A capacitively-coupled instrumentation amplifier (CCIA) with the current-reused and self-biased scheme is proposed to reduce the overall power consumption and to enhance the noise efficiency. The transistors in the amplifier are operated in the subthreshold region to enhance noise performance. The analog-domain spike detection based on a low power peak detector can reduce the overall power consumption. The circuit is fabricated using the standard 0.18~\mu \text{m} CMOS process. The passband of the circuit is from 6.4 Hz to 4.46 kHz. Input-referred noise is 10.68~\mu Vrms. The supply voltage is 0.6 V, and the power consumption of the single-stage CCIA is 50.6 nW. The CCIA achieves a good noise efficiency factor and power efficiency factor of 1.79 and 1.93, respectively. The overall power consumption including two CCIAs, the programmable gain amplifier, and the analog spike detector is 269.8 nW. Input spikes with an amplitude of 50~\mu \text{V} at 100-Hz intervals are accurately detected.