Bias optimization for switched capacitor amplifiers

Bias optimization is one of the most important design issues in many low power applications. Several biasing schemes for switched capacitor applications are analyzed in this paper from the settling time point of view. A bias circuit is described that provides the best tradeoff between the slew-rate...

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Veröffentlicht in:IEEE transactions on circuits and systems. 2, Analog and digital signal processing Analog and digital signal processing, 1997-12, Vol.44 (12), p.985-989
Hauptverfasser: Opris, I.E., Lewicki, L.D.
Format: Artikel
Sprache:eng
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Zusammenfassung:Bias optimization is one of the most important design issues in many low power applications. Several biasing schemes for switched capacitor applications are analyzed in this paper from the settling time point of view. A bias circuit is described that provides the best tradeoff between the slew-rate and the unity gain bandwidth of a single dominant-pole opamp over process and temperature variations. Theoretical analysis and simulations confirm a quasi-constant settling time with minimal process dependence.
ISSN:1057-7130
1558-125X
DOI:10.1109/82.644533