Characterization and improvement of a YBCO multilayer film process for HTS circuit applications

We have developed a 2" multilayer HTS integrated circuit process which contains up to three superconducting YBCO layers, epitaxial dielectric (SrTiO/sub 3/ or SrTiO/sub 3/+Sr/sub 2/AlTaO/sub 6/ combination), Ag wiring, an integrated resistor and non-epitaxial Si/sub x/N/sub y/ dielectric. We ha...

Ausführliche Beschreibung

Gespeichert in:

Bibliographische Detailangaben
Veröffentlicht in:	IEEE transactions on applied superconductivity 1997-06, Vol.7 (2), p.2057-2062
Hauptverfasser:	Pettiette-Hall, C.L., Murduck, J., Burch, J.F., Sergant, M., Hu, R., Cordrump, J., Luong, M., Ellis, R.K.
Format:	Artikel
Sprache:	eng
Schlagworte:	Applied sciences Design optimization Dielectrics Electronics Exact sciences and technology High temperature superconductors Nonhomogeneous media Resistors Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices Superconducting devices Superconducting epitaxial layers Superconducting films Superconducting integrated circuits Wiring Yttrium barium copper oxide
Online-Zugang:	Volltext bestellen
Tags:	Tag hinzufügen Keine Tags, Fügen Sie den ersten Tag hinzu!

Beschreibung
Zusammenfassung:	We have developed a 2" multilayer HTS integrated circuit process which contains up to three superconducting YBCO layers, epitaxial dielectric (SrTiO/sub 3/ or SrTiO/sub 3/+Sr/sub 2/AlTaO/sub 6/ combination), Ag wiring, an integrated resistor and non-epitaxial Si/sub x/N/sub y/ dielectric. We have incorporated the use of n-factorial and Taguchi designed experiments to develop and optimize various aspects of this process. This article highlights the designed experiments which addressed fabrication issues for HTS superconducting crossovers, dielectric integrity, and HTS/Ag metal contact resistance.
ISSN:	1051-8223 1558-2515
DOI:	10.1109/77.620995