Novel sampling algorithm for DSP controlled 2 kW PFC converter

This paper proposes a novel sampling algorithm for digital signal processing (DSP) controlled 2 kW power factor correction (PFCs) converters, which can improve switching noise immunity greatly in average-current-control power supplies. Based on the newly developed DSP chip TMS320F240. a 2 kW PFC sta...

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Veröffentlicht in:	IEEE transactions on power electronics 2001-03, Vol.16 (2), p.217-222
Hauptverfasser:	Zhou, Jinghai, Lu, Zhengyu, Lin, Zhengyu, Ren, Yuancheng
Format:	Artikel
Sprache:	eng
Schlagworte:	Algorithms Converters Digital signal processing Digital signal processing chips Electronics Frequency conversion Noise Power factor correction Power supplies Power supply Process control Sampling Sampling methods Signal processing algorithms Signal sampling Switching Switching converters
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Beschreibung
Zusammenfassung:	This paper proposes a novel sampling algorithm for digital signal processing (DSP) controlled 2 kW power factor correction (PFCs) converters, which can improve switching noise immunity greatly in average-current-control power supplies. Based on the newly developed DSP chip TMS320F240. a 2 kW PFC stage is implemented. The novel sampling algorithm shows great advantages when the converter operates at a frequency above 30 kHz.
ISSN:	0885-8993 1941-0107
DOI:	10.1109/63.911145