A portable digital DLL for high-speed CMOS interface circuits

A portable digital DLL for high-speed CMOS interface circuits

A digital delay-locked loop (DLL) that achieves infinite phase range and 40-ps worst case phase resolution at 400 MHz was developed in a 3.3-V, 0.4-/spl mu/m standard CMOS process. The DLL uses dual delay lines with an end-of-cycle detector, phase blenders, and duty cycle correcting multiplexers. Th...

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Veröffentlicht in:IEEE journal of solid-state circuits 1999-05, Vol.34 (5), p.632-644
Hauptverfasser: Garlepp, B.W., Donnelly, K.S., Jun Kim, Chau, P.S., Zerbe, J.L., Huang, C., Tran, C.V., Portmann, C.L., Stark, D., Yiu-Fai Chan, Lee, T.H., Horowitz, M.A.
Format: Artikel
Sprache:eng
Schlagworte:
Associate members
Blenders
Circuit testing
Circuits
Clocks
CMOS
CMOS digital integrated circuits
CMOS process
Delay lines
Digital
Dynamic link libraries
High speed
Jitter
Phase detection
Portability
Standards development
Voltage
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Zusammenfassung:A digital delay-locked loop (DLL) that achieves infinite phase range and 40-ps worst case phase resolution at 400 MHz was developed in a 3.3-V, 0.4-/spl mu/m standard CMOS process. The DLL uses dual delay lines with an end-of-cycle detector, phase blenders, and duty cycle correcting multiplexers. This more easily process portable DLL achieves jitter performance comparable to a more complex analog DLL when placed into identical high-speed interface circuits fabricated on the same test-chip die. At 400 MHz, the digital DLL provides
ISSN:0018-9200
1558-173X
DOI:10.1109/4.760373