A 23-ns 1-Mb BiCMOS DRAM
A 1-Mb BiCMOS DRAM having a 23-ns access time is described. The DRAM uses a direct sensing technique and a nonaddress-multiplexing configuration. This technique combines the NMOS differential circuit on each pair of data lines with a common highly sensitive bipolar circuit. The resulting chip has be...
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| Veröffentlicht in: | IEEE journal of solid-state circuits 1990-10, Vol.25 (5), p.1102-1111 |
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| container_end_page | 1111 |
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| container_issue | 5 |
| container_start_page | 1102 |
| container_title | IEEE journal of solid-state circuits |
| container_volume | 25 |
| creator | Kitsukawa, G. Yanagisawa, K. Kobayashi, Y. Kinoshita, Y. Ohta, T. Udagawa, T. Miwa, H. Miyazawa, H. Kawajiri, Y. Ouchi, Y. Tsukada, H. Matsumoto, T. Itoh, K. |
| description | A 1-Mb BiCMOS DRAM having a 23-ns access time is described. The DRAM uses a direct sensing technique and a nonaddress-multiplexing configuration. This technique combines the NMOS differential circuit on each pair of data lines with a common highly sensitive bipolar circuit. The resulting chip has been verified to have high-speed characteristics while maintaining a wide operating margin and a relatively small chip size of 62.2 mm/sup 2/, in spite of a 1.3- mu m lithography level.< > |
| doi_str_mv | 10.1109/4.62130 |
| format | Article |
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The DRAM uses a direct sensing technique and a nonaddress-multiplexing configuration. This technique combines the NMOS differential circuit on each pair of data lines with a common highly sensitive bipolar circuit. The resulting chip has been verified to have high-speed characteristics while maintaining a wide operating margin and a relatively small chip size of 62.2 mm/sup 2/, in spite of a 1.3- mu m lithography level.< ></description><identifier>ISSN: 0018-9200</identifier><identifier>EISSN: 1558-173X</identifier><identifier>DOI: 10.1109/4.62130</identifier><identifier>CODEN: IJSCBC</identifier><language>eng</language><publisher>New York, NY: IEEE</publisher><subject>Application software ; Applied sciences ; BiCMOS integrated circuits ; Driver circuits ; Electronics ; Exact sciences and technology ; Integrated circuits ; Integrated circuits by function (including memories and processors) ; Laboratories ; Lithography ; Microprocessors ; MOS devices ; Random access memory ; Semiconductor electronics. Microelectronics. Optoelectronics. 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The DRAM uses a direct sensing technique and a nonaddress-multiplexing configuration. This technique combines the NMOS differential circuit on each pair of data lines with a common highly sensitive bipolar circuit. The resulting chip has been verified to have high-speed characteristics while maintaining a wide operating margin and a relatively small chip size of 62.2 mm/sup 2/, in spite of a 1.3- mu m lithography level.< ></description><subject>Application software</subject><subject>Applied sciences</subject><subject>BiCMOS integrated circuits</subject><subject>Driver circuits</subject><subject>Electronics</subject><subject>Exact sciences and technology</subject><subject>Integrated circuits</subject><subject>Integrated circuits by function (including memories and processors)</subject><subject>Laboratories</subject><subject>Lithography</subject><subject>Microprocessors</subject><subject>MOS devices</subject><subject>Random access memory</subject><subject>Semiconductor electronics. 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Microelectronics. Optoelectronics. Solid state devices</topic><topic>Timing</topic><toplevel>peer_reviewed</toplevel><toplevel>online_resources</toplevel><creatorcontrib>Kitsukawa, G.</creatorcontrib><creatorcontrib>Yanagisawa, K.</creatorcontrib><creatorcontrib>Kobayashi, Y.</creatorcontrib><creatorcontrib>Kinoshita, Y.</creatorcontrib><creatorcontrib>Ohta, T.</creatorcontrib><creatorcontrib>Udagawa, T.</creatorcontrib><creatorcontrib>Miwa, H.</creatorcontrib><creatorcontrib>Miyazawa, H.</creatorcontrib><creatorcontrib>Kawajiri, Y.</creatorcontrib><creatorcontrib>Ouchi, Y.</creatorcontrib><creatorcontrib>Tsukada, H.</creatorcontrib><creatorcontrib>Matsumoto, T.</creatorcontrib><creatorcontrib>Itoh, K.</creatorcontrib><collection>Pascal-Francis</collection><collection>CrossRef</collection><collection>Electronics & Communications Abstracts</collection><collection>Technology Research Database</collection><collection>Advanced Technologies Database with Aerospace</collection><jtitle>IEEE journal of solid-state circuits</jtitle></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Kitsukawa, G.</au><au>Yanagisawa, K.</au><au>Kobayashi, Y.</au><au>Kinoshita, Y.</au><au>Ohta, T.</au><au>Udagawa, T.</au><au>Miwa, H.</au><au>Miyazawa, H.</au><au>Kawajiri, Y.</au><au>Ouchi, Y.</au><au>Tsukada, H.</au><au>Matsumoto, T.</au><au>Itoh, K.</au><format>journal</format><genre>article</genre><ristype>JOUR</ristype><atitle>A 23-ns 1-Mb BiCMOS DRAM</atitle><jtitle>IEEE journal of solid-state circuits</jtitle><stitle>JSSC</stitle><date>1990-10-01</date><risdate>1990</risdate><volume>25</volume><issue>5</issue><spage>1102</spage><epage>1111</epage><pages>1102-1111</pages><issn>0018-9200</issn><eissn>1558-173X</eissn><coden>IJSCBC</coden><abstract>A 1-Mb BiCMOS DRAM having a 23-ns access time is described. The DRAM uses a direct sensing technique and a nonaddress-multiplexing configuration. This technique combines the NMOS differential circuit on each pair of data lines with a common highly sensitive bipolar circuit. The resulting chip has been verified to have high-speed characteristics while maintaining a wide operating margin and a relatively small chip size of 62.2 mm/sup 2/, in spite of a 1.3- mu m lithography level.< ></abstract><cop>New York, NY</cop><pub>IEEE</pub><doi>10.1109/4.62130</doi><tpages>10</tpages></addata></record> |
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| identifier | ISSN: 0018-9200 |
| ispartof | IEEE journal of solid-state circuits, 1990-10, Vol.25 (5), p.1102-1111 |
| issn | 0018-9200 1558-173X |
| language | eng |
| recordid | cdi_crossref_primary_10_1109_4_62130 |
| source | IEEE Electronic Library (IEL) |
| subjects | Application software Applied sciences BiCMOS integrated circuits Driver circuits Electronics Exact sciences and technology Integrated circuits Integrated circuits by function (including memories and processors) Laboratories Lithography Microprocessors MOS devices Random access memory Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices Timing |
| title | A 23-ns 1-Mb BiCMOS DRAM |
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