A multibit test trigger circuit for megabit SRAMs
A multibit test (MBT) trigger circuit for megabit SRAM packages with no unused pins is discussed. The features of the MBT trigger circuit are a logic trigger mode without using any additional pins and practical use of counter circuits. The essence of trigger mode selection is that two pulses are for...
Gespeichert in:
Veröffentlicht in: | IEEE journal of solid-state circuits 1990-02, Vol.25 (1), p.68-71 |
---|---|
Hauptverfasser: | , , , , , |
Format: | Artikel |
Sprache: | eng |
Schlagworte: | |
Online-Zugang: | Volltext bestellen |
Tags: |
Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
|
Zusammenfassung: | A multibit test (MBT) trigger circuit for megabit SRAM packages with no unused pins is discussed. The features of the MBT trigger circuit are a logic trigger mode without using any additional pins and practical use of counter circuits. The essence of trigger mode selection is that two pulses are for MBT set and three pulses are for MBT reset. In this way, a logic trigger mode that does not use NC pins is especially effective as a 4-Mb SRAM. In addition, the proposed scheme is able to act as a logic trigger for an MBT circuit. The scheme is simple and effective. The logic trigger mode is proposed for future standardization.< > |
---|---|
ISSN: | 0018-9200 1558-173X |
DOI: | 10.1109/4.50286 |