S/370 sign-magnitude floating-point adder

A 56 bit S/370 sign-magnitude adder for floating-point operations implemented in a four-level metal bipolar master-slice technology is described. The design of the two-to-one adder is based on a carry lookahead scheme with implicit calculation of the end-around carry. The implementation of the float...

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Bibliographische Detailangaben

Veröffentlicht in:	IEEE journal of solid-state circuits 1989-08, Vol.24 (4), p.1062-1070
Hauptverfasser:	Vassiliadis, S., Lemon, D.S., Putrino, M.
Format:	Artikel
Sprache:	eng
Schlagworte:	Algorithm design and analysis Automatic logic units Ceramics Fault detection Registers Senior members
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