1.3- mu m CMOS/bipolar standard cell library for VLSI computers

The CMOS/bipolar standard cell library has been enhanced from 2 to 1.3 mu m for application to VLSI computers, such as 32-bit supermini- and microcomputers. This library has macrocells such as a 256-kb/8.4-ns ROM, 32-bit/4.5-ns carry propagation circuits for a 32-bit ALU, 4-kbyte/17-ns cache memory including an address translation function, and a 64-bit/37-ns multiplier. High integration density is obtained by using CMOS-based circuits and fast operation is achieved by using CMOS/bipolar sense circuits and drivers. In the cache memory, a functional sense amplifier, in which a conventional sense amplifier and a comparator are merged, is used. How to combine CMOS and bipolar devices in the macrocells along with application of the library to the VLSI computers is discussed.< >