Multichip packaging technology with laser-patterned interconnects
A multichip silicon-on-silicon packaging technology has been developed which incorporates laser-patterned thin-film interconnects. This technology is particularly suited for application in high-speed, high-power, and high-I/O systems, where its unique characteristics provide many advantages over mor...
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| Veröffentlicht in: | IEEE transactions on components, hybrids, and manufacturing technology hybrids, and manufacturing technology, 1989-12, Vol.12 (4), p.646-649 |
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| container_end_page | 649 |
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| container_issue | 4 |
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| container_title | IEEE transactions on components, hybrids, and manufacturing technology |
| container_volume | 12 |
| creator | Barfknecht, A.T. Tuckerman, D.B. Kaschmitter, J.L. McWilliams, B.M. |
| description | A multichip silicon-on-silicon packaging technology has been developed which incorporates laser-patterned thin-film interconnects. This technology is particularly suited for application in high-speed, high-power, and high-I/O systems, where its unique characteristics provide many advantages over more traditional methods. The laser-patterned thin-film interconnects allow higher I/O densities and better electrical performance than wire bonds or TAB (tape automated bonding). The face-up, thin-film eutectic die attach technique used provides much lower thermal resistance between the substrate and the chips than can be achieved with solder bump die attach. In addition, laser-patterned interconnects demonstrate superior ruggedness and fatigue resistance under thermomechanical cycling and shock. This technology has been used to produce a ten-chip memory module, samples of which have been subjected to testing by means of relevant methods of MIL-STD 883C.< > |
| doi_str_mv | 10.1109/33.49028 |
| format | Article |
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This technology is particularly suited for application in high-speed, high-power, and high-I/O systems, where its unique characteristics provide many advantages over more traditional methods. The laser-patterned thin-film interconnects allow higher I/O densities and better electrical performance than wire bonds or TAB (tape automated bonding). The face-up, thin-film eutectic die attach technique used provides much lower thermal resistance between the substrate and the chips than can be achieved with solder bump die attach. In addition, laser-patterned interconnects demonstrate superior ruggedness and fatigue resistance under thermomechanical cycling and shock. This technology has been used to produce a ten-chip memory module, samples of which have been subjected to testing by means of relevant methods of MIL-STD 883C.< ></description><identifier>ISSN: 0148-6411</identifier><identifier>EISSN: 1558-3082</identifier><identifier>DOI: 10.1109/33.49028</identifier><identifier>CODEN: ITTEDR</identifier><language>eng</language><publisher>New York, NY: IEEE</publisher><subject>Applied sciences ; Bonding ; Design. Technologies. Operation analysis. Testing ; Electric resistance ; Electronics ; Exact sciences and technology ; Fatigue ; Integrated circuits ; Microassembly ; Packaging ; Semiconductor electronics. Microelectronics. Optoelectronics. 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This technology is particularly suited for application in high-speed, high-power, and high-I/O systems, where its unique characteristics provide many advantages over more traditional methods. The laser-patterned thin-film interconnects allow higher I/O densities and better electrical performance than wire bonds or TAB (tape automated bonding). The face-up, thin-film eutectic die attach technique used provides much lower thermal resistance between the substrate and the chips than can be achieved with solder bump die attach. In addition, laser-patterned interconnects demonstrate superior ruggedness and fatigue resistance under thermomechanical cycling and shock. This technology has been used to produce a ten-chip memory module, samples of which have been subjected to testing by means of relevant methods of MIL-STD 883C.< ></description><subject>Applied sciences</subject><subject>Bonding</subject><subject>Design. Technologies. Operation analysis. Testing</subject><subject>Electric resistance</subject><subject>Electronics</subject><subject>Exact sciences and technology</subject><subject>Fatigue</subject><subject>Integrated circuits</subject><subject>Microassembly</subject><subject>Packaging</subject><subject>Semiconductor electronics. Microelectronics. Optoelectronics. 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Technologies. Operation analysis. Testing</topic><topic>Electric resistance</topic><topic>Electronics</topic><topic>Exact sciences and technology</topic><topic>Fatigue</topic><topic>Integrated circuits</topic><topic>Microassembly</topic><topic>Packaging</topic><topic>Semiconductor electronics. Microelectronics. Optoelectronics. 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This technology is particularly suited for application in high-speed, high-power, and high-I/O systems, where its unique characteristics provide many advantages over more traditional methods. The laser-patterned thin-film interconnects allow higher I/O densities and better electrical performance than wire bonds or TAB (tape automated bonding). The face-up, thin-film eutectic die attach technique used provides much lower thermal resistance between the substrate and the chips than can be achieved with solder bump die attach. In addition, laser-patterned interconnects demonstrate superior ruggedness and fatigue resistance under thermomechanical cycling and shock. This technology has been used to produce a ten-chip memory module, samples of which have been subjected to testing by means of relevant methods of MIL-STD 883C.< ></abstract><cop>New York, NY</cop><pub>IEEE</pub><doi>10.1109/33.49028</doi><tpages>4</tpages><oa>free_for_read</oa></addata></record> |
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| identifier | ISSN: 0148-6411 |
| ispartof | IEEE transactions on components, hybrids, and manufacturing technology, 1989-12, Vol.12 (4), p.646-649 |
| issn | 0148-6411 1558-3082 |
| language | eng |
| recordid | cdi_crossref_primary_10_1109_33_49028 |
| source | IEEE Electronic Library (IEL) |
| subjects | Applied sciences Bonding Design. Technologies. Operation analysis. Testing Electric resistance Electronics Exact sciences and technology Fatigue Integrated circuits Microassembly Packaging Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices Semiconductor thin films Substrates Thermal resistance Transistors Wire |
| title | Multichip packaging technology with laser-patterned interconnects |
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