Examination of oxide damage during high-current stress of n-MOS transistors

Damage to n-channel MOSFETs under different levels of drain current stress is compared. It is shown that the post-stress I/sub d/-V/sub gs/ characteristics show distinctly different behavior for different stresses. These differences are interpreted in terms of the location of the stress damage along...

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Veröffentlicht in:IEEE transactions on electron devices 1993-05, Vol.40 (5), p.980-985
Hauptverfasser: Doyle, B.S., Krakauer, D.B., Mistry, K.R.
Format: Artikel
Sprache:eng
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Zusammenfassung:Damage to n-channel MOSFETs under different levels of drain current stress is compared. It is shown that the post-stress I/sub d/-V/sub gs/ characteristics show distinctly different behavior for different stresses. These differences are interpreted in terms of the location of the stress damage along the Si-SiO/sub 2/ interface. It is shown that damage from low drain current stress occurs at the Si-SiO/sub 2/ interface just inside the drain junction, under strong gate control. Damage from high drain current stress occurs at the Si-SiO/sub 2/ interface deeper inside the drain junction region, under weak gate control. The damage localization interpretation is supported by simulations and by localized Fowler-Nordheim injection experiments. It is further shown that at intermediate levels of drain current injection, the damage occurs at the Si-SiO/sub 2/ interface in both drain regions. The differences are explained in terms of the bipolar action at high drain current levels, which forces the channel charge away from the Si-SiO/sub 2/ interface at the drain junction edge.< >
ISSN:0018-9383
1557-9646
DOI:10.1109/16.210208