Modeling and characterization of SIPOS emitter and quasi-SIS emitter bipolar transistors

SIPOS (semi-insulating polycrystalline Si) emitter bipolar transistors have been fabricated with a common-emitter current gain of 8000 and a figure of merit (gain divided by intrinsic base sheet resistance) of 200 (k Omega /sq)/sup -1/. The high gain is attributed to a relatively low interface recom...

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Veröffentlicht in:IEEE transactions on electron devices 1993-04, Vol.40 (4), p.796-803
Hauptverfasser: Chuang, T.-M., Gutmann, R.J., Rose, K.
Format: Artikel
Sprache:eng
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Zusammenfassung:SIPOS (semi-insulating polycrystalline Si) emitter bipolar transistors have been fabricated with a common-emitter current gain of 8000 and a figure of merit (gain divided by intrinsic base sheet resistance) of 200 (k Omega /sq)/sup -1/. The high gain is attributed to a relatively low interface recombination velocity of the emitter contact, as measured by photo-induced microwave reflectometry. The cutoff frequency is measured to be 250 MHz, the low value attributed to a large emitter contact resistance of the SIPOS emitter. The authors suggest that a new figure of merit-transconductance divided by emitter resistance-should be considered for the comparison of the high-frequency performances of high emitter efficiency bipolar transistors. A quasi-SIS semiconductor-insulator-semiconductor emitter bipolar with a poly-Si emitter and undoped SIPOS as an interfacial layer was also fabricated. By incorporating a field-enhancement factor in the SIPOS, the behavior of this transistor is successfully explained by a SIS emitter model. The ideality factor ratio in the Gummel plot is attributed to the different barrier heights of electrons and holes at the SiO/sub 2//n-Si interface.< >
ISSN:0018-9383
1557-9646
DOI:10.1109/16.202793