A computer architecture laboratory course using programmable logic
This paper describes the software and hardware developed for the laboratory component of a junior/senior level computer architecture course. The principal feature of this course is that students are required to design and build their own computers using programmable logic devices (PLDs). The student...
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| Veröffentlicht in: | IEEE transactions on education 1995-05, Vol.38 (2), p.118-125 |
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| container_end_page | 125 |
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| container_issue | 2 |
| container_start_page | 118 |
| container_title | IEEE transactions on education |
| container_volume | 38 |
| creator | Brown, G.M. Vrana, N. |
| description | This paper describes the software and hardware developed for the laboratory component of a junior/senior level computer architecture course. The principal feature of this course is that students are required to design and build their own computers using programmable logic devices (PLDs). The students use a simple register transfer language (CURTL) with a simulator and commercial PLD tools for their design activity. A graphical PC based debugging tool provides the I/O and main memory for the student built computers.< > |
| doi_str_mv | 10.1109/13.387212 |
| format | Article |
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| identifier | ISSN: 0018-9359 |
| ispartof | IEEE transactions on education, 1995-05, Vol.38 (2), p.118-125 |
| issn | 0018-9359 1557-9638 |
| language | eng |
| recordid | cdi_crossref_primary_10_1109_13_387212 |
| source | IEEE Electronic Library (IEL) |
| subjects | Computational modeling Computer architecture Computer simulation Debugging Design methodology Hardware Laboratories Programmable logic arrays Programmable logic devices Registers |
| title | A computer architecture laboratory course using programmable logic |
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