A computer architecture laboratory course using programmable logic

A computer architecture laboratory course using programmable logic

This paper describes the software and hardware developed for the laboratory component of a junior/senior level computer architecture course. The principal feature of this course is that students are required to design and build their own computers using programmable logic devices (PLDs). The student...

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Veröffentlicht in:IEEE transactions on education 1995-05, Vol.38 (2), p.118-125
Hauptverfasser: Brown, G.M., Vrana, N.
Format: Artikel
Sprache:eng
Schlagworte:
Computational modeling
Computer architecture
Computer simulation
Debugging
Design methodology
Hardware
Laboratories
Programmable logic arrays
Programmable logic devices
Registers
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Zusammenfassung:This paper describes the software and hardware developed for the laboratory component of a junior/senior level computer architecture course. The principal feature of this course is that students are required to design and build their own computers using programmable logic devices (PLDs). The students use a simple register transfer language (CURTL) with a simulator and commercial PLD tools for their design activity. A graphical PC based debugging tool provides the I/O and main memory for the student built computers.< >
ISSN:0018-9359
1557-9638
DOI:10.1109/13.387212