Near-ideal subthreshold swing MoS 2 back-gate transistors with an optimized ultrathin HfO 2 dielectric layer
In this paper, a near-ideal subthreshold swing MoS back-gate transistor with an optimized ultrathin HfO dielectric layer is reported with detailed physical and electrical characteristics analyses. Ultrathin (10 nm) HfO films created by atomic-layer deposition (ALD) at a low temperature with rapid-th...
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Veröffentlicht in: | Nanotechnology 2019-03, Vol.30 (9), p.095202 |
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Hauptverfasser: | , , , , , , , , |
Format: | Artikel |
Sprache: | eng |
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Zusammenfassung: | In this paper, a near-ideal subthreshold swing MoS
back-gate transistor with an optimized ultrathin HfO
dielectric layer is reported with detailed physical and electrical characteristics analyses. Ultrathin (10 nm) HfO
films created by atomic-layer deposition (ALD) at a low temperature with rapid-thermal annealing (RTA) at different temperatures from 200 °C to 800 °C have a great effect on the electrical characteristics, such as the subthreshold swing (SS), on-to-off current (I
/I
) ratio, etc, of the MoS
devices. Physical examinations are performed, including x-ray diffraction, atomic force microscopy, and electrical experiments of metal-oxide-semiconductor capacitance-voltage. The results demonstrate a strong correlation between the HfO
dielectric RTA temperature and the film characteristics, such as film density, crystallization degree, grain size and surface states, inducing a variation in the electrical parameters, such as the leakage, D
, equivalent oxide thickness, SS, and I
, as well as I
/I
of the MoS
field effect transistors with the same channel materials and fabrication methods. With a balance between the crystallization degree and the surface state, the ultrathin (10 nm) HfO
gate dielectric RTA at 500 °C is demonstrated to have the best performance with a field effect mobility of 40 cm
V
s
and the lowest SS of 77.6 mV
decade, which are superior to those of the control samples at other temperatures. The excellent transistor results with an optimized industry-based HfO
ALD and RTA process provide a promising approach for MoS
applications into the scaling of the nanoscale CMOS process. |
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ISSN: | 0957-4484 1361-6528 |
DOI: | 10.1088/1361-6528/aaf956 |