1.2 kV reverse blocking Schottky-drain Si–GaN monolithic integrated cascode FET

1.2 kV reverse blocking Schottky-drain Si–GaN monolithic integrated cascode FET

In this work, a novel reverse blocking Schottky-drain Si–GaN monolithic integrated cascode FET was realized for the first time by using transfer printing and self-aligned etching technology. The threshold voltage is up to 4.5 V, which meets the needs of the power electronic system. The on-resistance...

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Veröffentlicht in:AIP advances 2021-10, Vol.11 (10), p.105112-105112-5
Hauptverfasser: Zhang, Jiaqi, Zhang, Weihang, Wan, Jing, Yang, Guofang, Wu, Yichang, Cheng, Ya’nan, Zhang, Yachao, Chen, Dazheng, Zhao, Shenglei, Zhang, Jincheng, Zhang, Chunfu, Hao, Yue
Format: Artikel
Sprache:eng
Schlagworte:
Electronic systems
Self alignment
Threshold voltage
Transfer printing
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Zusammenfassung:In this work, a novel reverse blocking Schottky-drain Si–GaN monolithic integrated cascode FET was realized for the first time by using transfer printing and self-aligned etching technology. The threshold voltage is up to 4.5 V, which meets the needs of the power electronic system. The on-resistance is 57.1 Ω mm, and the on-voltage is 1.1 V. The forward/reverse breakdown voltage (at 10 µA/mm) reaches 1325/−1240 V for LGD = 18 µm. The mechanism of reverse blocking is proposed and analyzed from the point of view of circuits. In addition, the correctness of the mechanism is verified by simulation and experiment.
ISSN:2158-3226
2158-3226
DOI:10.1063/5.0066189