Device physics and design of double-gate tunneling field-effect transistor by silicon film thickness optimization

The device physics of the double-gate tunneling field-effect transistor (DG TFET) is explored through two dimensional device simulations. The on-state drain current I on of the DG TFET, which is based on band-to-band tunneling, has a strong dependence on the silicon film thickness T Si and the physics governing it is detailed. It is established that band-to-band tunneling at the surface is very strong and accounts for a large part of the total drain current. However, a substantial part of the total drain current I d s is contributed by a subsurface portion of the silicon film. Detailed potential distributions show that the coupling of two gate electrodes in the DG TFET could effectively reduce the tunneling width ω T at the center of the silicon film up to an optimum T Si where maximum drain current is obtained.