A counterbased field programmable gate array implementation of the one-bit autocorrelation and cross-correlation functions

In this article we describe a novel design of the fixed-length, one-bit autocorrelation function (ACF) using a Spartan XC2S300 field programmable gate array (FPGA). It has been implemented both asynchronously and synchronously following the same underlying architectural concept. Although some problems arose in the asynchronous case due to the nature of the design, these were overcome with a synchronous architecture. With this new design method there has been a ninefold reduction in terms of FPGA active area usage for the implementation of the algorithm compared to the more traditional approach. At the same time there has also been a fivefold increase in speed, reaching 250 MHz compared with the previous 47 MHz.