Controlling fixed trap charge effect in FinFET using heterodielectric BOX

This Letter presents an Si FinFET on heterodielectric BOX, where the effect of trap charges can be avoided. The investigation is based on a 3D simulation study. The BOX height also plays a significant role in the device characteristics. The effect of trap charges using homodielectric and heterodiele...

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Veröffentlicht in:	Electronics letters 2018-02, Vol.54 (4), p.239-241
Hauptverfasser:	Das, Rajashree, Baishya, Srimanta
Format:	Artikel
Sprache:	eng
Schlagworte:	3D simulation study dielectric devices dielectric materials electron density elemental semiconductors FinFET fixed trap charge effect control heterodielectric BOX homodielectric BOX MOSFET ON‐OFF performance metric semiconductor device reliability semiconductor industry Semiconductor technology silicon temperature 293 K to 298 K visible temperature effect
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