A fully integrated reprogrammable memristor–CMOS system for efficient multiply–accumulate operations
Memristors and memristor crossbar arrays have been widely studied for neuromorphic and other in-memory computing applications. To achieve optimal system performance, however, it is essential to integrate memristor crossbars with peripheral and control circuitry. Here, we report a fully functional, h...
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Veröffentlicht in: | Nature electronics 2019-07, Vol.2 (7), p.290-299 |
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Sprache: | eng |
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Zusammenfassung: | Memristors and memristor crossbar arrays have been widely studied for neuromorphic and other in-memory computing applications. To achieve optimal system performance, however, it is essential to integrate memristor crossbars with peripheral and control circuitry. Here, we report a fully functional, hybrid memristor chip in which a passive crossbar array is directly integrated with custom-designed circuits, including a full set of mixed-signal interface blocks and a digital processor for reprogrammable computing. The memristor crossbar array enables online learning and forward and backward vector-matrix operations, while the integrated interface and control circuitry allow mapping of different algorithms on chip. The system supports charge-domain operation to overcome the nonlinear
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characteristics of memristor devices through pulse width modulation and custom analogue-to-digital converters. The integrated chip offers all the functions required for operational neuromorphic computing hardware. Accordingly, we demonstrate a perceptron network, sparse coding algorithm and principal component analysis with an integrated classification layer using the system.
A programmable neuromorphic computing chip based on passive memristor crossbar arrays integrated with analogue and digital components and an on-chip processor enables the implementation of neuromorphic and machine learning algorithms. |
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ISSN: | 2520-1131 2520-1131 |
DOI: | 10.1038/s41928-019-0270-x |