Design Rules for Memories Based on Graphene Ferroelectric Field-Effect Transistors

Despite the great progress of ferroelectric gated field-effect transistors (Fe-FETs) based on graphene and other 2D materials, a device model that accurately describes the hysteretic transfer characteristics and provides guidelines on performance enhancement of the Fe-FET is still lacking. Here, we...

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Veröffentlicht in:ACS applied electronic materials 2020-01, Vol.2 (1), p.2-8
Hauptverfasser: Hassanpour Amiri, Morteza, Heidler, Jonas, Müllen, Klaus, Asadi, Kamal
Format: Artikel
Sprache:eng
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Zusammenfassung:Despite the great progress of ferroelectric gated field-effect transistors (Fe-FETs) based on graphene and other 2D materials, a device model that accurately describes the hysteretic transfer characteristics and provides guidelines on performance enhancement of the Fe-FET is still lacking. Here, we present an experimentally validated analytical model that couples charge displacement of the ferroelectric layer with the charge transport in the graphene layer. The model describes hysteretic transfer characteristics of the Fe-FETs with good accuracy and predicts that the on/off ratio of the graphene Fe-FET is determined by Dirac bias and the charge carrier mobility. The model predicts the unsuitability of an ideal graphene layer for memory application and outlines the conditions to achieve the best memory performance in graphene Fe-FETs. The model is generic and can be as well used for Fe-FETs based on other 2D materials.
ISSN:2637-6113
2637-6113
DOI:10.1021/acsaelm.9b00532