Nested chopper instrument amplifier with noise modulation for physiological signal sensing

This article presents a novel CMOS nested chopper instrumentation amplifier (NCIA) suitable for physiological signal (such as EEG, ECG and EMG) acquisition systems. By incorporating a DC offset suppression module and impedance boosting loop, the implemented instrumentation amplifier achieves high in...

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Veröffentlicht in:Integration (Amsterdam) 2025-03, Vol.101, p.102332, Article 102332
Hauptverfasser: Liu, Bo, Zhang, Dong, Liu, Tianyu, Li, Kai, Wang, Jinchan, Wang, Jun
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Sprache:eng
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Zusammenfassung:This article presents a novel CMOS nested chopper instrumentation amplifier (NCIA) suitable for physiological signal (such as EEG, ECG and EMG) acquisition systems. By incorporating a DC offset suppression module and impedance boosting loop, the implemented instrumentation amplifier achieves high input impedance and low DC offset voltage. The usage of novel nested chopping technology with noise shifting in the filtering circuit effectively eliminates low-frequency noise, which makes it well-suited for analog front-end (AFE) sensing systems for precision extraction of weak physiological signals. The proposed NCIA circuit is implemented based on 180 nm/1.8 V standard BCD technology. Under 1.8V power supply voltage, the power consumption of the overall amplifier circuit is 4.17 μW, the total input reference noise is 771.365 nVrms, and the total circuit layout area is 5.47 × 10−2 mm2. •This paper proposes a complete design and implementation of a high-performance CMOS nested chopper instrument amplifier (NCIA) circuit for physiological signal sensing.•The proposed nested chopping topology can significantly counteract the residual spike pulse (causing offset voltage and DC variation) induced by a regular chopping amplifier.•By combining artfully DC servo loop feedback (DSL) and positive feedback loop (PFL) technology into NCIA, it can better eliminate the 1/f low-frequency noise and DC offset voltage while ensuring a competitive power-efficiency.•A novel topology of chopper switch is proposed by introducing dummy transistor pair to minimize the unexpected dynamic bias noise and charge injection effects in chopping process.
ISSN:0167-9260
DOI:10.1016/j.vlsi.2024.102332