Enhancement in electrical properties of dual-active-layer amorphous SiZnSnO/SiInZnO thin film transistors

Bi-layer thin film transistors (TFTs) have been fabricated with a channel structure comprising a dielectric layer, a semiconducting amorphous-Si-In-Zn-O (a-SIZO) layer, and a semiconducting amorphous-Si-Zn-Sn-O (a-SZTO) layer, aiming to improve field effect mobility and stability. These films were deposited using RF sputtering at room temperature. The TFTs with a bottom gate top contact, processed at 500 °C, exhibited high mobilities (>32 cm2 V−1 s−1) along with a current on/off ratio of approximately 108 and a subthreshold swing (SS) value below 0.5 V decade−1 primarily because of reduced trap density and presence of highly conducting ultrathin a-SIZO layer. Furthermore, the bi-layer TFTs demonstrated notable stability under negative and positive bias temperature stress conditions. [Display omitted] •Fabrication of bi-layer TFTs featuring a channel structure composed of a dielectric layer, semiconducting a-SIZO layer, and a semiconducting a-SZTO layer.•TFTs showcasing field effect mobilities exceeding 32 cm2 V−1 s−1, along with a current on/off ratio of approximately 108 and an SS value below 0.5 V decade−1.•Exceptional stability of the bi-layer TFTs demonstrated under temperature and bias stresses of ±20 V.