Comparison and analysis on static and dynamic performance of 1.2-kV SiC planar MOSFETs with different cell topologies

1.2-kV SiC MOSFETs with different cell topologies were fabricated based on the same design and process parameters in a commercial 6-inch SiC foundry. A series of comparative evaluations were conducted on the static and dynamic performance of SiC MOSFETs with common linear, island-shaped P+ linear, current sharing linear, and hexagonal cell topologies for the first time. The common linear cell topology has the lowest switching loss, but the highest on-resistance. The island-shaped P+ linear and current sharing linear cell topologies optimized the cell pitch, reduced the specific on-resistance by 9.68 %, but the freewheeling and surge capability of their body diode have been decreased. The current sharing linear cell topology has the highest Ciss/Crss, making it the lowest in crosstalk intensity. The hexagonal cell topology has the lowest on-resistance, but performs the worst in terms of blocking characteristics and switching losses.