Process-induced losses by plasma leakage in lithography-free shadow masked interdigitated back contact silicon heterojunction architectures

Silicon (Si) Heterojunction (HJ) solar cells with interdigitated back contact (IBC) are considered a promising candidate for next-generation silicon photovoltaics due to the highest efficiency on a single junction device achieved by this architecture. However, the complex fabrication process involving photolithography has limited its prospect for commercial scalability and adoption by the industry. To overcome this challenge, we have investigated a lithography-free process for HJ IBC using in-situ shadow masking during the deposition of doped layers to form an interdigitated pattern combined with laser ablation for contact formation. However, this process resulted in poor open-circuit voltage (VOC). Lifetime measurements, Photoluminescence (PL), and electroluminescence (EL) studies showed that this does not originate from passivation loss. We investigated this phenomenon using back junction (BJ) test structures with rear architecture similar to our IBC cells to isolate the emitter. A detailed characterization using optical microscopy, EL and current density-voltage (J-V) analysis revealed the plasma leakage during the process resulted in shunts, a barrier to injection, and resistive losses. To mitigate this process-induced loss, we developed a uniform controllable wet-etch method to remove the plasma leaked layer. This resulted in improving VOC in the HJ IBC cells by greater than 300 mV, thereby validating the detrimental effect of plasma leak and its significance in developing a low-cost, manufacturable and scalable process for high-efficiency Si HJ IBC solar cells. [Display omitted]