A wideband low power RF Receiver Front-End for Internet-of-Things applications

This paper presents a broadband RF receiver front-end circuit that offers advantages in both area and power consumption. The design features an innovative dual-path noise-canceling Low-Noise Amplifier (LNA) circuit, achieving impedance matching and balun functionality without the need for on-chip inductors. The RF receiver front-end circuit comprises a I and Q doublebalanced quadrature passive mixers and an 25% duty-cycle LO generator. The circuit’s broadband characteristics enable it to operate across a wide range of frequency bands. It is implemented using a 65 nm CMOS process. The core circuit, including both RF and baseband signal paths, consumes a mere 12 mW of power. Test results demonstrate that the RF receiver front-end circuit achieves a conversion gain of 35–40 dB, a noise figure (NF) below 4.8 dB, and a minimum third-order intercept point (IIP3) exceeding −6.8 dBm over the 0.1–3.1 GHz frequency range. The chip’s overall footprint is compact at 0.9 mm2, with the entire RF signal path powered by a 1 V supply, offering clear advantages in terms of compactness and low power consumption.