Integrated multi-band RF transceiver design for multi-standard applications using 130 ​nm CMOS technology

This paper presents high efficiency, high integration, and wideband low-IF radio frequency transceiver for multi-standard applications using 130 ​nm CMOS technology. The proposed low-IF transceiver includes receiver, transmitter, and quadrature voltage-controlled power oscillator (QVCO). The proposed receiver consists of a low-noise driver stage designed using Capacitive Cross-Coupling (CCC) common-gate configuration, and I/Q demodulator. While, the proposed transmitter composes of an I/Q modulator and an RF power amplifier, where the I/Q modulator consists of two up-conversion mixers, a five ports transformer along with switched capacitors bank for reconfigurable RF output matching. The proposed receiver has a frequency band of 0–10 ​GHz, while the operating frequency of the proposed transmitter equals 1.5–4 ​GHz. The proposed RF transceiver design is suitable for multi-band LTE, IOT, WSN, and multi-standard applications. The proposed receiver achieves a power gain of 15.4 ​dB, noise figure (NF) equals 3.8 ​dB, sensitivity equals −100.2 dBm and a dynamic range of 92.2 dBm. On the other hand, the proposed transmitter has a saturated output power of 23 dBm, power added efficiency (PAE) equals 41%, the power gain of 25 ​dB, and adjacent channel power ratio (ACPR) of equals −31.8dBc. The proposed receiver and transmitter consume 10.85 ​mW, and 180.95 ​mW, respectively, including the QVCO. The receiver and transmitter Figures of Merit (FoM) equal 191.5 ​dB and 2.45 ​dB respectively. The active areas of the proposed receiver and transmitter equal 0.56mm2 and 1.6mm2, respectively while the chip areas are1.6mm2 and 2.4mm2, respectively.