Design of small volume and low power consumption logic gates based on 4-terminal multilevel magnetic cell

•This article proposes new logic gates based on four-channel magnetic cell (mcell) with new magnetic logic (mlogic) called multilevel cell gate (MLC Gate).•In order to design the proposed gate circuit, MLC Gate is used magnetic gate (MGate) basic structure to reduce heat losses, Spin Based Electronic Gate (SBEG) structure to reduce the number of mcells and create a neural network, and finally the multi-level property of voltage-controlled spin orbit torque-memory (MV-SOTM) cells to reduce energy consumption.•mcell with mlogic proposed in this article has only four bases. The two writing paths of the mcell are composed of two layers with constant magnetization, which are made in two opposite directions to align the direction of the electric current with the direction of the domain wall field. The two reading paths of the mcell are made of two MTJ magnetic cells in series. So that the variable ferromagnetic layer of these two MTJ cells is isolated under the influence of the domain wall field by an insulating layer of Mgo.•One of the advantages of multi leveling mcell is increasing the working frequency to an acceptable value and in this article, the use of the voltage controlled magnetic anisotropy (VCMA) method is well stated to describe the reduction of the critical switching current. Spintronics is an emerging technology for designing logic circuits. The non-volatile logic based on the magnetic tunnel junction (MTJ) cell is a suitable solution to overcome the leakage power problem, which has become a major obstacle for CMOS technology. Here, we introduce a new style of magnetic gate (mGate) logic, which is built by a four-terminal cell. This cell operated by motion of domain wall that is based on spin transfer torque (STT) in a multi-level cell (MLC) structure. To reduce the complexity, a static circuit with a resistive load in ratioed logic style has been used. The use of MLC Gate logic in the static ratioed logic circuit is a suitable solution to reduce the complexity level of structure and power consumption in logic circuits in the field of spintronics. The performance of different magnetic logic gates have been investigated by simulations. The simulation results show that the MLC Gates offer a smaller area and lower power consumption and lower energy in comparison with the previous mGate and magnetic computing in memory.