Securing the Internet of Things with Ascon-Sign

With a Cryptographically-Relevant Quantum Computer (CRQC) estimated to be viable within the next 15 years, the development of post-quantum security is imperative. Previously secure networks may soon fall victim to these CRQCs as they will likely attack the weakest link in a network. In modern networks, these weak-links are often present in the form of Internet of Things (IoT) devices, as the resource constrains imposed by these wireless nodes leads to lowered security. We offer the first Ascon-Sign implementation for resource constrained FPGAs, which allows a wireless sensor network to verify nodes. Our design runs twice as fast as similarly-area constrained devices, and shows a 33% reduction in power per operation. We demonstrate the capability of our design by integrating it with a wireless sensor network for weather detecting. We also propose an amendment to the Ascon-Sign specification that allows for shortened processing time and lower memory requirements. [Display omitted] •We introduce an area-efficient, FPGA implementation of Ascon-Sign that shows a 33% power reduction compared to similar works.•We evaluate the effect of multiple hash-permutations per clock cycle on the power, area, and throughput of Ascon-Sign.•We propose an amendment to the Ascon-Sign specification that that decreases signature generation runtime, as well as memory requirements.