Comparison of different power flow techniques for power grid vulnerability assessment against symmetrical faults using bus impedance matrix

Due to the widespread proliferation of distributed generation resources and the current market situation, ensuring the security and reliability of power grids against fault events has become a more challenging task. The aim of this paper is to compare different power flow techniques for power grid vulnerability assessment against symmetrical fault incidents using bus impedance matrix. In this study, first, the relationship of the post-fault voltage phasor at each bus with the pre-fault voltage phasors at that bus and the faulted bus, impedance matrix elements, and fault impedance is investigated through power system analysis under pre-fault and post-fault circumstances. Subsequently, the accuracy of different iterative and non-iterative power flow algorithms, i.e. Newton Raphson (NR), Fast Decoupled (FD), and Direct Current (DC) methods, for the power grid vulnerability assessment is compared. To achieve this, the fault analysis at each bus is performed commencing with a very large fault impedance and ending with the fault impedance at which one of the buses reaches the low voltage violation limit. Finally, to appraise the proposed strategy, several simulations have been undertaken on IEEE 14 bus system using MATLAB software. The simulation results indicate that the power grid vulnerability against symmetrical faults is highly influenced by the type of applied power flow technique. •Extraction of post-fault bus voltage equation using bus impedance matrix.•Power grid vulnerability assessment against symmetrical fault incidents.•Comparison among various power flow methods for power grid vulnerability assessment.