Design of new low-power and high-speed quaternary flip-flops based on CNTFETs

In this paper, novel configurations of a quaternary edge-sensitive flip-flop are introduced. They are realized by employing carbon nanotube field-effect transistors (CNTFETs). The first structure is based on a tri-state quaternary buffer integrated into a multiplexer. In the second proposed design, a quaternary input is decoded and then stored by tri-state binary buffers. In the end, binary values are converted to a quaternary value again. Finally, the last proposed circuit is not a d-type flip-flop; instead, a quaternary value is loaded by two controlling signals. The innovative configurations reduce the number of transistors, power consumption, and delay compared to previous approaches. The proposed designs are simulated and tested using HSPICE software and the CNTFET 32 nm library. The simulation results exhibit promising performance for the given quaternary flip-flops. For example, while having eight fewer transistors, the first proposed design has 87.7% higher performance in terms of power-delay product compared to one of the competitors with a similar structure. Finally, a quaternary shift register and a quaternary counter are also implemented to demonstrate the applicability of the third proposed quaternary FF in larger sequential circuits.