The optimal integration strategy and authorization mechanism of AI chip with the architecture design capacity
•We explore the optimal technical level of products with different authorization mechanisms.•We study the integration strategy of the manufacturer with architecture design capability.•We analyze the optimal integration strategy and authorization mechanism of all parties.•We discuss the impact of the...
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Veröffentlicht in: | Computers & industrial engineering 2022-06, Vol.168, p.108027, Article 108027 |
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Format: | Artikel |
Sprache: | eng |
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Zusammenfassung: | •We explore the optimal technical level of products with different authorization mechanisms.•We study the integration strategy of the manufacturer with architecture design capability.•We analyze the optimal integration strategy and authorization mechanism of all parties.•We discuss the impact of the second-generation architecture design on TP and M.
As manufacturers and subsystem suppliers purchase different authorizations of chip technology to meet customer requirements for chip functions, different authorization mechanisms have emerged. Moreover, manufacturers are considering whether to integrate subsystem suppliers to eliminate indirect costs. Therefore, this paper analytically explores the associated operational challenges of whether manufacturers (M) make backward integration and how to design subsystem architecture when technology providers (TP) are leaders. Moreover, we analytically derive the optimal backward integration strategy and the authorization mechanism. Our findings suggest that previous studies on chip supply chains have failed to explore integration and different authorization mechanisms. First, no matter what the authorization mechanism is, the integration cost and the revenue sharing ratio between the technology provider and the manufacturer affect the backward integration strategy. Then, considering the manufacturer’s architectural design, the manufacturer determines whether to conduct architectural design based on the architectural design capability and the architectural design ability cost conversion factor. Secondly, we obtain the Pareto optimality of TP and M in the integration process, the Pareto optimality of TP, M and S in the architecture design process with non-integration, the Pareto optimality of TP and M in the architecture design process with integration and the Pareto optimality of M and S in the architecture design process. Finally, we find the manufacturer's architectural design can promote demand for M and TP, and for M, it causes demand to trend higher in the short term, but not for TP. |
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ISSN: | 0360-8352 1879-0550 |
DOI: | 10.1016/j.cie.2022.108027 |