Low temperature crystallization of atomic-layer-deposited SrTiO3 films with an extremely low equivalent oxide thickness of sub-0.4 nm

[Display omitted] •Potential applications include use as a high-k dielectric for DRAM capacitors.•Pt electrodes mitigate excess Sr incorporation at the initial growth.•Full crystallization of ALD SrTiO3 films via post-deposition annealing at ≤500 °C.•Extremely low equivalent oxide thickness of 0.34 nm with ultralow leakage currents. Despite SrTiO3(STO) possessing a high dielectric constant, its application as a capacitor dielectric in dynamic random-access memory(DRAM) capacitors faces challenges due to the high-temperature annealing for crystallization, its compositional inhomogeneity, and the high leakage currents of STO films. To address these issues, we employ atomic layer deposition(ALD) of STO films onto Pt substrates at elevated temperatures(340–380 °C). The use of low-reactivity Pt electrodes effectively mitigates the initial growth of excess Sr, ensuring enhanced compositional uniformity along the film growth direction. Coupled with ALD at high temperatures, this approach facilitates the crystallization of STO films in the as-grown state, further enhancing the crystallinity with increasing film thickness. Subsequent low-temperature post-deposition annealing (PDA) at 400 and 500 °C achieves full crystallization. This process results in a remarkable increase in the dielectric constant, reaching approximately 150. Furthermore, the absence of microcracks after PDA, attributed to the formation of adequately dense films, contributes to substantially improved dielectric properties. Consequently, these STO films exhibit an exceptionally low equivalent oxide thickness of 0.34 nm coupled with an ultralow leakage current of 3.7 × 10−8 A/cm2 at an operation voltage of 0.8 V, promising for advancing DRAM capacitors. This study presents a pathway for the sustainable scaling of DRAMs, addressing challenges in ALD-grown STO films.